Non-conventional computation techniques for Deep Learning

The research addresses the development of digital and mixed-signal circuits(either ASICs or FPGA-based architectures) targeting the requirements of massively parallel, high-throughput (>1 TOPS), highly energy efficient (>50 TOPS/W), real-time computation of convolutional neural networks (CNNs) in deep learning applications (image and speech recognition, etc..). Particular emphasis will be given to approximate computing techniques and energy-quality scalability, which are explored both from a theoretical perspective (CNN structure) and with reference to the hardware implementation. The research is partially carried out in cooperation with the National University of Singapore (NUS, GreenIC Group).

ERC Sector:

  • PE7_5 (Micro and nano) electronic, optoelectronic and photonic components
  • PE7_7 Signal processing
  • PE7_11 Components and systems for applications

Keywords:

  • Neural network hardware
  • Convolutional neural networks
  • Deep Learning
  • Dyadic Digital Pulse Modulation (DDPM)

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