Circuit architectures: Implementation and statistical characterization of high efficiency true random number generators (RNGs) for cryptographic applications

Practical implementations of RNGs can be classified into two major categories, namely pseudo-RNGs and physical-RNGs.

Pseudo-RNGs are deterministic, numeric algorithms that expand short seeds into long bit sequences. Conversely, physical-RNGs rely on microscopic processes resulting in macroscopic observables which can be regarded as random noise (quantum, thermal,…).

Pseudo-RNGs generally depart more from the ideal specifications: are based on finite memory algorithms, thus exhibit periodic behaviors and generate correlated samples and are therefore unsuitable for data security and cryptography. Their substantial advantage is the algorithmic nature which makes them easily embeddable in any digital circuit or system.

Physical-RNGs, on the other hand, are the best approximation of TRNGs. Unfortunately, they may require very specialized hardware and/or environmental conditions, which make them expensive to embed. A possible workaround for the implementation of TRNGs which closes the gap with the processing speed and ease of implementation of pseudo-RNGs and make them usable in a vast class of cyber-physical and embedded systems is relying on chaotic circuits.

As an example, a very simple modification of pipeline analog-to-digital converters (ADC) parts implement a chaotic map which can be analytically proven to behave as TRNGs in an ideal setting and that robustly maintain such properties with respect to implementation errors.

ERC Sector:

  • PE7_2 Electrical engineering: power components and/or systems
  • PE7_4 (Micro and nano) systems engineering
  • PE7_7 Signal processing

Keywords:

  • Random number generation
  • Cryptography
  • Chaos
  • ADC

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