Systems-on-Chip and Networks-on-Chip

This activity focuses on Systems-on-Chip (SoCs) platforms and related design methodology. Both homogeneous SoCs (i.e. many identical programmable cores) and heterogeneous SoCs (i.e. different cores mixed with application-specific accelerators) are investigated. The computational elements are connected with a network on-chip (NoC).  Issues under the lens of researchers are: The design of the cores, of the NoC switches, and the optimization of their performance and power consumption in spite of the limits of ultra-scaled technology; the analysis of their ultimate scalability in advanced nanometer technologies; the development of efficient design methods for the SoC platforms based on high levels of abstraction; the design of FPGA and ASIC prototypes to validate the research hypothesis.

On this topic 4 articles have been published in international reviews and 8 papers have been presented to various conferences.

Research groups

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