Digital architectures for communication systems
This research activity is aimed at studying, designing and implementing efficient architectures for critical processing functions in wireless, wireline and satellite communication systems, as well as control systems. Different implementation technologies are targeted (including ASIC, FPGA and programmable processors) for addressing critical issues, such as throughput, power dissipation, cost and flexibility. Specific interest is posed to the hardware implementation of advanced error correcting systems (turbo and LDPC codes, digital fountain), MIMO detection, global positioning and navigation.
On this reasearch topic have been published 10 articles in international reviews and 25 papers have been presented to various conferences.