IEEE802.11n Prototype

Architectural exploration and VHDL development of the key IEEE 802.11n channel coding blocks, including high throughput low latency Viterbi, turbo and LDPC decoders; validation by means of an FPGA based prototype setup using a STM proprietary board based on a System On Chip with an ARM core (Spear).

Class International project
Status Completed (31/12/2005)
Type Consulting and Research Contracts
Lenght 24 months