A2SOWIWA - Algorithms, Architectures and Integrated Circuits for "System on Chip" in CMOS Technology for Wireless Applications in Wideband
The research program faces the problem of integrating in deeply scaled CMOS technology (up to 65 nm) of SOC complex systems containing a digital part with analog base-band and RF interfaces.
Study of CMOS RF devices, transceiver architectures and algorithms for systems on chip for broadband wireless applications. Main project goals are:
- Study of CMOS technology with less than 100nm channel length
- Design techniques for millimeter wavelength CMOS transceivers
- Design techniques, circuits and prototyping of analog filters in 65nm CMOS technology
- Efficient receiver architectures for millimeter wavelength broadband systems
- Baseband algorithms for wireless broadband systems in the millimeter wavelength range
- Architectures and efficient implementation of algorithms for baseband processing
The research activities will focus on mobile terminal design within two system scenarios: the digital video broadcasting to handheld terminals (the DVB-H standard and its evolution), and the personal area networks utilizing the 60 GHz bandwidth in the context of IEEE 802.15 WPAN Task Group 3c, characterized by extremely high data rates, up to 2 Gbit/s.
The research will lead to the design and implementation of critical receiver parts, including the RF section, the baseband analog filters, the baseband signal processing modules.
Research Projects Supported by Structural and National Funds